Reconfigurable Networks-on-Chip

Zusatztext

<p>This book provides a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip. It addresses a wide spectrum of on-chip communication problems, ranging from physical, network, to application layers. Specific topics that are explored in detail include packet routing, resource arbitration, error control/correction, application mapping, and communication scheduling. Additionally, a novel bi-directional communication channel NoC (BiNoC) architecture is described, with detailed explanation. </p><p><b></p><ul><li>Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chip; </li><li>Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues; </li><li>Describes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC. </li></ul><p>From the Foreword:</p><p>Overall this book shows important advances over the state of the art that will affect future system design as well as R&D in tools and methods for NoC design. It represents an important reference point for both designers and electronic design automation researchers and developers.</p><p>--Giovanni De Micheli</p>

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